1. Field of the Invention
The present invention relates to methods of fabricating semiconductor devices, and more particularly, to methods of curing a tunnel oxide layer of a nonvolatile memory device.
2. Description of the Related Art
Nonvolatile memory devices are memory devices capable of retaining data when the supply of power thereto is stopped. Example nonvolatile memory devices include flash memory which is widely used in mobile communication terminals and portable data storage devices. The demand for nonvolatile memory devices has increased dramatically, which has caused nonvolatile memory devices to play an important role in the memory markets.
Flash memory devices are capable of being programmed in cell units and erased in block units or sector units. To program, erase, or read data in a flash memory, charges are injected into a floating gate of a memory cell transistor to obtain a high threshold voltage or charges are released from the floating gate of the memory cell transistor to obtain a low threshold voltage. When program/erasing operations are performed, the charges are injected into the floating gate or released from the floating gate through a tunnel oxide layer. Therefore, the operational reliability of the flash memory can be highly influenced by the electrical properties of the tunnel oxide layer.
The electrical properties of the tunnel oxide layer may be improved during fabrication using various growth and subsequent thermal treatment processes. However, subsequent processes, such as dry etching and washing, can deteriorate the properties of the tunnel oxide layer and, thereby, deteriorate the reliability of the memory device. One process that can deteriorate the properties of the tunnel oxide layer is a trench etching process.
As semiconductor devices become smaller, a self-aligned trench isolation structure for simultaneously patterning a floating gate and a trench isolation layer has typically been used. The self-aligned trench isolation structure has the advantage of decreasing the number of processes, and may thereby improve the reliability of the gate oxide layer and decrease the associated distribution of a threshold voltage in a cell array.
However, through the trench etching process, edge regions of the tunnel oxide layer exposed by a trench may be easily damaged due to plasma etching compared to a center region of the tunnel oxide layer. For example, plasma ions generated during gate etching may be deposited on the edge regions of the tunnel oxide layer, and unstable bonds, such as Si—O and Si—H, which are strained by damage due to the etching, may increase at the edges of the tunnel oxide layer. Such defects function as traps of electrons or holes during data programming or erasing operations of a nonvolatile memory device, and thus may deteriorate the reliability of the nonvolatile memory device.
In an attempt to cure the defects of the tunnel oxide layer, in general, a sidewall oxidation process may be subsequently performed after performing the trench etching process. The sidewall oxidation process is typically a radical oxidation process that uses O2 or H2. During a radical oxidation process, enough sidewall oxidation should be performed to attempt to remove defect bonds at the edges of the tunnel oxide layer and to cure damage due to the trench etching. However, as the size of the devices becomes smaller with increasing numbers of targets for the sidewall oxidation, the reliability improvement of the device using a radical oxidation process can be limited due, for example, to punch through occurring in the tunnel oxide layer.